Two-point modulator comprising a PLL circuit and a simplified digital pre-filtering system

ABSTRACT

A two-point modulator includes a PLL circuit and a simplified digital pre-filtering system. The two-point modulator includes a first circuit path for impressing an analog modulation signal into a first point in the PLL circuit, and a second circuit path for impressing a digital modulation signal into a second point in the PLL circuit. The second circuit path actuates a frequency divider in the feedback path in the PLL circuit and contains a digital filter which has a square-wave pulse response.

This application is a National Stage filing of International ApplicationNo. PCT/DE02/01914 filed May 24, 2002, which is entitled “Two-PointModulator Comprising a PLL Circuit and a Simplified DigitalPre-filtering System”, which was not published in English, that claimspriority to German Patent Application No. 101 27 612.5 filed on Jun. 7,2001.

FIELD OF THE INVENTION

The invention relates to a two-point modulator for phase or frequencymodulation with a PLL circuit which is designed for impressing an analogand a digital modulation signal. In particular, the invention relates tothe prefiltering of the digital modulation signal.

BACKGROUND OF THE INVENTION

A low-complexity implementation of a transmitter design for transceiversin mobile radio systems is provided by transmitters which have amodulator operating on the basis of the known principle of two-pointmodulation. In this case, a PLL (Phase Locked Loop) circuit is used as afrequency synthesizer and is used for phase or frequency modulation of aradio-frequency signal.

The modulation signals are usually impressed at two points in the PLLcircuit. First, a programmable frequency divider in the PLL circuit isactuated by a digital modulation signal. The programmable frequencydivider is fitted in the PLL circuit's feedback path and represents apoint in the PLL circuit at which a low-pass response is obtained forimpressing a modulation. In this case, the digital modulation signal canhave a larger bandwidth than the low-pass filter formed by the PLLcircuit. Secondly, an analog modulation signal is injected into asummation point which is situated in the PLL circuit's forward path andis preferably connected upstream of the voltage controlled oscillator.The analog modulation supplied at the summation point has a high-passfiltering effect on the output of the PLL circuit on account of theclosed control loop, which means that the corresponding modulationsignal is in turn corrupted by the response. The digital and analogmodulation signals are superimposed on one another at the output of thePLL circuit, and in this way a frequency-independent response for thePLL circuit is obtained. The simultaneous impression of a digital and ananalog modulation signal into a PLL circuit is called two-pointmodulation.

Such a two-point modulator and a method for phase or frequencymodulation with a PLL circuit is described in German laid-openspecification DE 199 29 167 A1. A digital modulation signal is suppliedto the control connection of a frequency divider in the PLL circuit'sfeedback path, and this determines the number by whose reciprocal theinstantaneous frequency of the input signal for the frequency divider ismultiplied. In addition, the digital modulation signal is converted bymeans of a digital/analog converter into an analog modulation signalwhich is injected into the PLL circuit at a summation point whichrepresents a high-pass point. This laid-open specification can beregarded as the closest prior art to the present invention.

In the case of the described type of transmitter design, the controlloop remains closed. To achieve low noise in the PLL circuit, thebandwidth of the PLL circuit is designed to be much smaller than wouldbe necessary for transmitting the modulated data. To compensate for thesmall bandwidth, the analog modulation signal is injected into the PLLcircuit in addition to the digital modulation signal.

Both the digital modulation signal and the analog modulation signal areprefiltered in order to limit the PLL circuit's output spectrum. Thedigital modulation signal is usually filtered by means of oversampling,i.e. one bit is represented by a plurality of samples. In addition, fortwo-point modulation to work correctly, it is necessary for a highdegree of correspondence between the amplitudes of the two modulationsignals to be ensured in addition to phase equality over time. In thecase of known two-point modulators, filters having the same pulseshaping are used for the digital and analog prefiltering for thisreason. A drawback of this is the correspondingly high implementationcomplexity for such digital and analog filters.

SUMMARY OF THE INVENTION

It is therefore an object of the invention to create a two-pointmodulator for phase or frequency modulation with a PLL circuit, in whichthe filters used for prefiltering the digital and analog modulationsignals can have different pulse shapings and at least one of the twofilters is intended to have the lowest implementation complexitypossible, without significantly altering the two-point modulator'stransmission spectrum in the process.

The object on which the invention is based is achieved by the featuresof the independent patent claims. Advantageous developments andrefinements are specified in the subclaims.

An inventive two-point modulator which is used for phase or frequencymodulation has a PLL circuit. In addition, the two-point modulatorcomprises a first circuit path, which impresses an analog modulationsignal into a first point in the PLL circuit. In this case, the positionof the first point is chosen such that the analog modulation signalsupplied to the PLL circuit at this point has a high-pass filteringeffect on the output of the PLL circuit on account of the closed controlloop. Advantageously, the first point is situated upstream of a voltagecontrolled oscillator contained in a PLL circuit. In addition, thetwo-point modulator comprises a second circuit path, which impresses adigital modulation signal into a second point in the PLL circuit. Thesecond circuit path is connected to the control connection of afrequency divider which, in the case of two-point modulators, iscontained in the PLL circuit's feedback path. The result of this is thatthe digital modulation signal, which actuates the frequency divider andthus prescribes the number required for frequency division, has alow-pass filtering effect on the output of the PLL circuit. Afundamental concept of the invention is that the second circuit pathcontains a digital filter which has a square-wave pulse response, i.e.in the frequency domain the digital filter has an almost constantresponse on account of the oversampling in the passband of the low-passfilter formed by the PLL circuit.

The digital filter contained in the second circuit path can be producedby a digital filter with a square-wave pulse response on account of thesmall bandwidth of the closed PLL control loop. Usually, there is notmuch difference between the transfer functions of a digital filter whichis normally used for these purposes and of a digital filter with asquare-wave pulse response within the small bandwidth of the PLL controlloop. The present invention therefore makes it possible for the complexdigital filter used to date, whose pulse response frequently has theshape of a Gaussian curve, to be replaced by a simple digital filterhaving a square-wave pulse response (square-wave filter), without thepossibility of identifying any significant difference in the two-pointmodulator's transmission spectrum. The first circuit path remainsunaffected by this invention.

As in the case of known two-point modulators with PLL circuits,provision can also be made for the first circuit path to contain afilter, which can be an analog filter, for example. The pulse shaping ofthe filter contained in the first circuit path can differ from theinventive square-wave pulse shaping in the digital filter. Provision canalso be made for the modulation signal transmitted by the first circuitpath also to be filtered in the digital domain using downstreamdigital/analog conversion.

Advantageously, the purpose of digital square-wave filtering can beserved by incorporating a digital filter into the two-point modulatorwhose transfer function is characterized in that a value received at theinput of the digital filter, which value has been stored in a register,for example, is output a plurality of times at the output of the digitalfilter.

In another advantageous refinement of the invention, the amplitude ofthe pulse response of the digital filter can be controlled using a unit.This allows the amplitude of the digital modulation signal and hence themodulation index to be adjusted in a simple manner if required. Bycontrast, known two-point modulators with the same filter function forthe digital and analog filtering require each filter coefficient to beadjusted individually, or require additional multiplication or divisionto be carried out with appropriate rounding operations.

Another aspect of the invention relates to a method for phase orfrequency modulation with a PLL circuit which operates on the basis ofthe principle of two-point modulation. The inventive method involves ananalog modulation signal being injected into the PLL circuit at a firstpoint. The first point has to satisfy the condition that a high-passresponse is obtained there for an injected modulation frequency. Adigital modulation signal first passes through a digital filter and isthen injected into the PLL circuit at a second point. In this case, thedigital modulation signal actuates a frequency divider which isincorporated in a feedback path in the PLL circuit and on which alow-pass response is obtained for the digital modulation signal. Theinventive method is characterized in that the digital filter has asquare-wave pulse response.

One advantage of the inventive method is the low implementationcomplexity for the digital filtering. The small bandwidth of the closedPLL control loop means that there is not much difference between thetransfer functions of a normally used digital filter, which has the samepulse shape as a filter which is usually used for filtering the analogmodulation signal, and of a digital filter with a square-wave pulseresponse within the PLL control loop's bandwidth. It is therefore notpossible to identify any significant difference in the PLL circuit'stransmission spectrum.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block level schematic diagram illustrating a modulatorcircuit containing a phase locked loop circuit according to the presentinvention.

DETAILED DESCRIPTION OF THE INVENTION

The invention is explained below by way of example using an exemplaryembodiment which is shown in a drawing. The single FIGURE shows aschematic diagram of a two-point modulator with a PLL circuit and amodulation circuit.

The FIGURE shows a two-point modulator 1 with a PLL circuit 2. The PLLcircuit 2 produces an output signal with an output frequency F_(OUT)from an input or reference signal with a reference frequency F_(REF).The output signal with the output frequency F_(OUT) can be modulated bya digital modulation signal 16 and an analog modulation signal 17.

Besides the PLL circuit 2, the two-point modulator 1 comprises amodulation circuit 3 which is coupled to the PLL circuit 2 at suitablepoints and is used to modulate the output signal from the PLL circuit 2.

The PLL circuit 2 contains a phase detector PFD (Phase FrequencyDetector) 4, to whose inputs the reference signals with the referencefrequency F_(REF) and a fed back frequency divider signal 14 aresupplied. The reference signal is derived from a quartz oscillator, forexample. The phase detector 4 compares the phases of the two signalssupplied on the input side and, on the output side, produces a controlsignal 13 which corresponds to the phase difference between the twosignals supplied to its inputs. The control signal 13 is input to aninput on a charge pump CP 5. The charge pump 5 takes the control signal13 as a basis for generating a current for the purpose of charging aloop filter LF 6 which is connected downstream of the charge pump 5. Theloop filter 6 contains an integrating portion and a low-pass filter forsmoothing the control signal 13. The signal which is output by the loopfilter 6 passes through a summation point 7, which is used for injectingthe analog modulation signal 17, and is then supplied to a voltagecontrolled oscillator VCO 8. The voltage controlled oscillator 8represents the oscillation-producing element in the PLL circuit 2 andgenerates the output signal from the PLL circuit, which output signalhas the output frequency F_(OUT).

The control loop in the PLL circuit 2 is closed by a feedback path. Thefeedback path supplies the output signal from the voltage controlledoscillator 8 to an input on the phase detector 4 via a programmablefrequency divider DIV 9. Normally, the programmable frequency divider 9is in the form of a multi-modulus frequency divider. In the steady stateof the PLL circuit 2, the output frequency F_(OUT) of the output signalcorresponds exactly to the multiple of the reference frequency F_(REF),which multiple is determined by the programmable frequency divider 9.

The way in which the two-point modulator 1 works is known. Two-pointmodulation involves the modulation circuit 3 being used to impress thedigital modulation signal 16 and the analog modulation signal 17 intothe PLL circuit 2. The FIGURE shows an example of a modulation circuit 3which conditions the digital and analog modulation signals 16 and 17 andsupplies them to the PLL circuit 2. The exemplary modulation circuit 3in the present case comprises a digital filter 10, a digital/analogconverter DAC 11 and an analog filter 12.

An input on the modulation circuit 3 is supplied with a modulationsignal 15, which is a digital signal in the present exemplaryembodiment. The modulation signal 15 is supplied to the digital filter10, which is a low-pass filter. Following the smoothing by the digitalfilter 10, the digital modulation signal 16 is supplied to a controlinput of the programmable frequency divider 9. By way of example, thedigital modulation signal 16 has a succession of data words, with eachdata word representing a number. When each data word is received via itscontrol input, the programmable frequency divider 9 is programmed suchthat it multiplies the frequency F_(OUT) obtained from the voltagecontrolled oscillator 8 by the reciprocal of the number obtained.

In addition, the modulation signal 15 is supplied to the digital/analogconverter 11 and, following conversion thereof into the analog domain,passes through the analog filter 12. Next, the analog modulation signal17 which can be output at the output of the analog filter 12 is suppliedto an input on the summation point 7.

Introducing the modulation into the PLL circuit 2 using the programmablefrequency divider 9 weights the modulation signal 15 with a low-passfilter function.

This restricts the signal to a bandwidth which is generally smaller thanthe modulation bandwidth. However, an essentially frequency-independentresponse for the PLL circuit 2 is required. For this reason, themodulation is supplied to the PLL circuit 2 at a point with a high-passresponse. In the present PLL circuit 2, this is done at the summationpoint 7. There, the analog modulation signal 17 is superimposed on theconditioned control signal 13, so that the sum of both signals controlsthe voltage controlled oscillator 8.

To obtain the highest possible spectral efficiency for the output signalfrom the voltage controlled oscillator 8, the digital modulation signal16 is prefiltered using the digital filter 10, and the analog modulationsignal 17 is prefiltered using the analog filter 12. In line with theinvention, a digital filter 10 with square-wave pulse shaping is usedfor this purpose. In the case of the present two-point modulator 1, thesmall bandwidth of the closed PLL circuit 2 means that such a digitalfilter 10 can be used without adversely affecting the transmissionspectrum of the two-point modulator 1. It is also not necessary for thedigital filter 10 and the analog filter 12 to have the same pulseshaping.

1. A two-point modulator circuit, comprising: a phase locked loopcircuit having a first circuit path operable to generate and input ananalog modulation signal into a first node of the phase locked loopcircuit having a high-pass response, the phase locked loop circuithaving a second circuit path operable to generate and input a digitalmodulation signal into a second node of the phase locked loop circuithaving a low-pass response, wherein the phase locked loop circuitfurther comprises a feedback path having a frequency divider therein,and wherein frequency divider comprises the second node, and wherein thesecond circuit path comprises a digital filter having a square-wavepulse response that outputs a value received at its input, wherein thedigital filter outputs the value a plurality of times within asquare-wave window and stores such values in a register.
 2. Thetwo-point modulator of claim 1, wherein the first circuit path furthercomprises an analog filter operable to output the analog modulationsignal.
 3. The two-point modulator of claim 1, wherein the digitalfilter further comprises a control unit operable to control an amplitudeof the square-wave pulse response.
 4. The two-point modulator of claim1, wherein the phase locked loop circuit further comprises: a voltagecontrolled oscillator operable to provide a phase- orfrequency-modulated output signal at its output; a phase detectoroperable to ascertain a phase difference between a feedback signal inthe feedback path derived from the output of the voltage controlledoscillator and a reference signal, and further operable to actuate thevoltage controlled oscillator based on the ascertained phase difference;and the feedback path containing the feedback signal and the frequencydivider.
 5. The two-point modulator of claim 4, wherein the first nodein the phase locked loop comprises a summation node and resides upstreamof the voltage controlled oscillator.
 6. A method for phase or frequencymodulation employing two-point modulation with a phase locked loopcircuit, comprising: injecting an analog modulation signal into a firstnode of the phase locked loop circuit, wherein the first node provides ahigh-pass response for a modulation frequency; digitally filtering adigital modulation signal, wherein the digital filtering comprises asquare-wave pulse response wherein a value of the digital modulationsignal is received and stored in a register a plurality of times in asquare-wave window; injecting the filtered digital modulation signalinto a second node of the phase locked loop circuit, and actuating afrequency divider with the filtered digital modulation signal, thefrequency divider residing in a feedback path in the phase locked loopcircuit, and wherein the second node provides a low-pass response for amodulation frequency.
 7. The method of claim 6, further comprisinganalog filtering the analog modulation signal prior to injecting theanalog modulation into the first node of the phase locked loop circuit.8. The method of claim 6, further comprising controlling an amplitude ofthe square-wave pulse response of the digital filter.
 9. The method ofclaim 6, wherein the phase locked loop circuit comprises a voltagecontrolled oscillator operable to provide a phase- orfrequency-modulated output signal at its output, a phase detectoradapted to ascertain a phase difference between a feedback signal fromthe feedback path, derived from the modulated output signal, and areference signal, and actuate the voltage controlled oscillator on thebasis of the ascertained phase difference.
 10. The method of claim 9,wherein the first node comprises a summation point in the phase lockedloop circuit, wherein the summation point is connected upstream of thevoltage controlled oscillator.
 11. A two-point modulator circuit,comprising: a phase locked loop circuit having a forward path and afeedback path; and a modulator circuit comprising a digital modulationcircuit and an analog modulation circuit, wherein the analog modulationcircuit is adapted to input an analog modulation signal into a firstnode in the forward path of the phase locked loop circuit, and whereinthe digital modulation circuit is adapted to provide a square-wave pulseresponse, wherein the digital modulation circuit receives an inputmodulation signal having a value and outputs the value a plurality oftimes within a square-wave window as a digital modulation signal, andwherein the digital modulation circuit is further adapted to input thedigital modulation signal into a second node in the feedback path of thephase locked loop circuit.
 12. The two-point modulator circuit of claim11, wherein the first node has a high-pass response with the phaselocked loop circuit.
 13. The two-point modulator circuit of claim 11,wherein the second node has a low-pass response with the phase lockedloop circuit.
 14. The two-point modulator circuit of claim 11, whereinthe analog modulation circuit receives the input modulation signal,converts the input modulation signal into an analog signal, and filtersthe analog signal to generate the analog modulation signal.
 15. Thetwo-point modulator of claim 11, wherein the phase locked loop circuitfurther comprises: a voltage controlled oscillator operable to provide aphase- or frequency-modulated output signal at its output; a phasedetector operable to ascertain a phase difference between a feedbacksignal in the feedback path derived from the output of the voltagecontrolled oscillator and a reference signal, and further operable toactuate the voltage controlled oscillator based on the ascertained phasedifference.
 16. The two-point modulator of claim 15, wherein the phaselocked loop circuit further comprises a frequency divider in thefeedback path, adapted to divide a frequency of the output of thevoltage controlled oscillator by a value associated with the digitalmodulation signal.